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| www..com PL-2506 Hi-Speed USB to IDE Bridge Controller Product Datasheet Document Revision: 1.2B Document Release: June 19, 2005 Prolific Technology Inc. 7F, No. 48, Sec. 3, Nan Kang Rd. Nan Kang, Taipei 115, Taiwan, R.O.C. Tel: 886-2-2654-6363 Fax: 886-2-2654-6161 Email: sales@prolific.com.tw URL: http://www.prolific.com.tw Support: http://tech.prolific.com.tw www..com Revised Date: July 19, 2005 ds_pl2506_v12B.doc Disclaimer All the information in this document is subject to change without prior notice. Prolific Technology Inc. does not make any representations or any warranties (implied or otherwise) regarding the accuracy and completeness of this document and shall in no event be liable for any loss of profit or any other commercial damage, including but not limited to special, incidental, consequential, or other damages. Trademarks The Prolific logo is a registered trademark of Prolific Technology Inc. All brand names and product names used in this document are trademarks or registered trademarks of their respective holders. Copyrights Copyright (c) 2005 Prolific Technology Inc. All rights reserved. No part of this document may be reproduced or transmitted in any form by any means without the express written permission of Prolific Technology Inc. PL-2506 Product Datasheet -2- Document Version 1.2B www..com Revised Date: July 19, 2005 ds_pl2506_v12B.doc Revision History Revision 1.2B Description Section 2.1.2: Added Pin Type Abbreviation Section 2.2.2: Added Pin Type Abbreviation Section 6.0: Modify DC Characteristics 1.2 1.1C 1.1B 1.1A 1.0 Sec. 2.2: Added LQFP48 Pin Assignment & Description Sec. 8.3: Added LQFP48 (7x7mm) Outline Diagram Sec. 8.1: Correct LQFP64 (10x10mm) Outline Diagram Sec. 8.2: Correct LQFP64 (7x7mm) Outline Diagram Sec. 8.1: Remove watermark on Outline Diagram Sec. 6.2: Modify Operating Current Parameters Formal Release of Datasheet June 16, 2005 May 17, 2005 March 1, 2005 February 25, 2005 January 26, 2005 July 19, 2005 Date PL-2506 Product Datasheet -3- Document Version 1.2B www..com Revised Date: July 19, 2005 ds_pl2506_v12B.doc Table of Contents 1.0 PRODUCT OVERVIEW ...................................................................................... 7 1.1 Overview ................................................................................................................. 7 1.2 Features .................................................................................................................. 7 1.3 Block Diagram ......................................................................................................... 8 2.0 PIN ASSIGNMENT & DESCRIPTION ................................................................ 9 2.1 LQFP64 Package .................................................................................................... 9 2.1.1 LQFP64 Pin Diagram .................................................................................... 9 2.1.2 LQFP64 Pin Description .............................................................................. 10 2.2 LQFP48 Package .................................................................................................. 12 2.2.1 LQFP48 Pin Diagram .................................................................................. 12 2.2.2 LQFP48 Pin Description .............................................................................. 13 3.0 USB PORT DESCRIPTOR ............................................................................... 15 3.1 Device Descriptor .................................................................................................. 15 3.2 Configuration Descriptor........................................................................................ 16 3.3 Interface Descriptors ............................................................................................. 16 3.4 Endpoint Descriptors ............................................................................................. 17 3.4.1 High-Speed mode........................................................................................ 17 3.4.2 Full-Speed mode ......................................................................................... 17 3.5 Device_Qualifier Descriptors................................................................................. 18 3.6 Other_Speed_Configuration Descriptors............................................................... 18 4.0 DEVICE CONTROL REQUESTS ..................................................................... 19 4.1 Standard Device Control Requests ....................................................................... 19 4.2 Class Specific Requests........................................................................................ 19 4.2.1 Bulk-Only Mass Storage Reset ................................................................... 19 4.2.2 Get Max LUN............................................................................................... 20 4.3 Vendor Specific Requests ..................................................................................... 20 4.3.1 SET_EEPROM_STRING Request .............................................................. 20 4.3.2 GET_EEPROM_STRING Request.............................................................. 20 PL-2506 Product Datasheet -4- Document Version 1.2B www..com Revised Date: July 19, 2005 ds_pl2506_v12B.doc 5.0 EXTERNAL SERIAL MEMORY........................................................................ 21 5.1 Data Structure of External Serial Memory Contents.............................................. 21 6.0 DC CHARACTERISTICS.................................................................................. 23 6.1 Absolute Maximum Ratings................................................................................... 23 6.2 Operating Current Parameters .............................................................................. 23 6.3 Recommended Operating Conditions ................................................................... 23 6.4 Leakage Current and Capacitance........................................................................ 24 6.5 DC Characteristics of 3.3V Programmable I/O Cells............................................. 24 7.0 ORDERING INFORMATION............................................................................. 24 8.0 OUTLINE DIAGRAM ........................................................................................ 25 8.1 LQFP64pin Package (10mm x 10mm) .................................................................. 25 8.2 LQFP64pin Package (7mm x 7mm) ...................................................................... 26 8.3 LQFP48pin Package (7mm x 7mm) ...................................................................... 27 PL-2506 Product Datasheet -5- Document Version 1.2B www..com Revised Date: July 19, 2005 ds_pl2506_v12B.doc List of Figures Figure 1-1 Block Diagram of PL-2506..................................................................................... 8 Figure 2-1 Pin Assignment Diagram of PL-2506 LQFP64 ...................................................... 9 Figure 2-2 Pin Assignment Diagram of PL-2506 LQFP48 .................................................... 12 Figure 8-1 Outline Diagram of PL-2506 LQFP64 (10mm x 10mm) ...................................... 25 Figure 8-2 Outline Diagram of PL-2506 LQFP64 (7mm x 7mm) .......................................... 26 Figure 8-3 Outline Diagram of PL-2506 LQFP48 (7mm x 7mm) .......................................... 27 List of Tables Table 2-1 USB2.0 PHY Related Pins (LQFP64) ................................................................... 10 Table 2-2 IDE Interface Related Pins (LQFP64) ................................................................... 10 Table 2-3 System Pins (LQFP64) ..........................................................................................11 Table 2-4 USB2.0 PHY Related Pins (LQFP48) ................................................................... 13 Table 2-5 IDE Interface Related Pins (LQFP48) ................................................................... 13 Table 2-6 System Pins (LQFP48) ......................................................................................... 14 Table 3-1 Device Descriptor.................................................................................................. 15 Table 3-2 Configuration Descriptor ....................................................................................... 16 Table 3-3 Interface Descriptors ............................................................................................. 16 Table 3-4a High-Speed Mode: Bulk Out Endpoint Descriptor (Endpoint 1)........................... 17 Table 3-4b High-Speed Mode: Bulk In Endpoint Descriptor (Endpoint 2) ............................. 17 Table 3-4c Full-Speed Mode: Bulk Out Endpoint Descriptor (Endpoint 1) ............................ 17 Table 3-4d Full-Speed Mode: Bulk In Endpoint Descriptor (Endpoint 2) ............................... 17 Table 3-5 Device Qualifier Descriptors.................................................................................. 18 Table 3-6 Other Speed Configuration Descriptors ................................................................ 18 Table 4-1 Class Specific Requests........................................................................................ 19 Table 4-2 Vendor Specific Requests ..................................................................................... 20 Table 5-1 Data Structure of EEPROM Contents ................................................................... 21 Table 5-2 String Descriptor Entries Data Structure ............................................................... 21 Table 5-3 Example of Valid EEPROM Contents.................................................................... 22 Table 6-1 Absolute Maximum Ratings................................................................................... 23 Table 6-2 Operating Current Parameters.............................................................................. 23 Table 6-3 Recommended Operating Conditions ................................................................... 23 Table 6-4 Leakage Current and Capacitance........................................................................ 24 Table 6-5 DC Characteristics of 3.3V Programmable I/O Cells............................................. 24 Table 7-1 Ordering Information ............................................................................................. 24 PL-2506 Product Datasheet -6- Document Version 1.2B www..com Revised Date: July 19, 2005 ds_pl2506_v12B.doc 1.0 Product Overview 1.1 Overview The PL-2506 is a single chip Hi-Speed USB-to-IDE bridge controller that is designed to perform seamless protocol transfer between the USB and ATA interface. The operating speed is determined by the capability of the host/hub it is connected to. PIO mode 0 to mode 4, Multi Word DMA mode 0 to mode 2, and Ultra DMA mode 0 to mode 4 are implemented to support broad range of standard ATA and ATAPI devices. The PL-2506 can support two devices at the same time using Master/Slave mode. To obtain the best performance possible, the PL-2506 will negotiate with the connected device(s) to select the proper mode supported by the device. The PL-2506 is implemented according to the USB Bulk-Only Mass Storage Class specification ver1.0. The USB mass storage driver is integrated in most OSes so no additional driver is needed. 1.2 Features AT Attachment with Packet Interface Extension (ATA/ATAPI-6) Compliant ATA interface support PIO mode 0~4, Multiword DMA mode 0~2, and Ultra-DMA mode 0~4 to work with ATA/ATAPI devices. Universal Serial Bus Specification 2.0 Compliant USB Mass Storage Class Bulk-Only Transport Specification Compliant Integrated the full speed (12Mbps) and high speed (480Mbps) transceiver Sufficient 2K bytes data buffer for both the downstream and upstream data transfer for optimized performance. Single or Two simultaneous ATA/ATAPI devices are supported Master or Slave ATA/ATAPI device(s) is detected automatically. Single device can be configured as master or slave device. Supports Multiple LUN Vendor/Product related information could be customized by external SPI serial Flash or external I2C compatible serial EEPROM. Contents of serial EEPROM or serial Flash can be updated through USB interface Multi-function General Purpose IO pins has defined for USB speed LED, button inputs, etc. GPIO pins can also be customized by external serial memory or through USB interface Low power consumption allows for bus-powered or self-powered operation Low power 2.5V core operating voltage On-chip 3.3V to 2.5V regulator to supply the power for core circuit 5V tolerant inputs, 3.3V output drive Single inexpensive 12-MHz crystal for clock source USB-IF Hi-Speed Logo and Microsoft Windows WHQL Logo Certified Inexpensive LQFP package type: o LQFP64pin (10x10mm) o LQFP64pin (7x7mm) o LQFP48pin (7x7mm) PL-2506 Product Datasheet -7- Document Version 1.2B www..com Revised Date: July 19, 2005 ds_pl2506_v12B.doc 1.3 Block Diagram USB 2.0 PHY (UTMI) PLL REGULATOR 3.3/2.5 V BACKEND SIE POWER MANAGEMENT LOGIC DEVICE INTERRUPT CONTROLLER MEMORY MANAGEMENT UNIT (MMU) UNIFIED RAM 2KB TURBO 20KB ROM 8032 MCU IDE CONTROLLER GPIO & SERIAL INTERFACE Figure 1-1 Block Diagram of PL-2506 PL-2506 Product Datasheet -8- Document Version 1.2B www..com Revised Date: July 19, 2005 ds_pl2506_v12B.doc 2.0 Pin Assignment & Description 2.1 LQFP64 Package 2.1.1 LQFP64 Pin Diagram RESETJ AGND1 AVCC1 XSCO GNDK VCCK RREF TEST XSCI SDA GND SCL NC NC NC NC NC AGND2 AVCC2 REGGND REGPWR REGVO PORT1_0 GND PORT1_1 USB_PWR PORT3_0 VCC3 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 49 32 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 1 2 3 4 5 6 7 8 31 30 29 28 27 26 DD7 DM DP DD8 VCC DD6 DD9 DD5 DD10 DD4 DD11 VCCK DD3 DD12 DD2 DD13 DD1 DD14 DD0 DD15 PL-2506 LQFP 64 25 24 23 22 21 20 19 18 17 9 10 11 12 13 14 15 16 DIOWJ PORT3_3 DMARQ CSJ1 CSJ0 DIORJ PORT3_1 Figure 2-1 Pin Assignment Diagram of PL-2506 LQFP64 PL-2506 Product Datasheet -9- DMACKJ IDERSTJ IORDY INTRQ GND Document Version 1.2B DA2 DA1 DA0 VCC www..com Revised Date: July 19, 2005 ds_pl2506_v12B.doc 2.1.2 LQFP64 Pin Description Pin Type Abbreviation: I: Input O: Output B: Bidirectional A: Analog P: Power/Ground T: Tri-state USB2.0 PHY Related Pins Table 2-1 USB2.0 PHY Related Pins (LQFP64) Symbol XSCI XSCO RREF DP DM VCCK GNDK AVCC1, AVCC2 AGND1, AGND2 P Type I O A B B P P P Pin No 42 43 46 48 47 40 41 44, 55 45, 54 Analog Ground for on-chip USB PHY Description Clock in or CMOS oscillator input CMOS oscillator output PLL Reference level High speed DPLUS signal High speed DMINUS signal Digital Power 2.5V Digital Ground Analog Power 3.3V for on-chip PHY IDE Interface Related Pins Table 2-2 IDE Interface Related Pins (LQFP64) Symbol DD[15:0] Type B Pin No 26,28, 30,33, 34,31, 29,27, 24,22, 20,18 DA[2:0] CSJ[1:0] USB_PWR IDERSTJ DIOWJ DIORJ DMACKJ IORDY INTRQ DMARQ T T I T T T T I I I 4,5,6 2,3 62 15 14 13 12 10 9 8 DA, Data Address pins of IDE interface. Will be in high impedance state until USB connection. CS_, Chip Select pins of IDE interface. Will be in high-impedance state until USB connection. USB VCC signal from USB connection Hardware reset pin of IDE interface. Will be in high impedance state until USB connection. ATA control. Will be in high impedance state until USB connection. ATA control. Will be in high impedance state until USB connection. ATA control. Will be in high impedance state until USB connection. ATA control ATA control ATA control Description 17,19, 21,23, 16 pins Data bus of IDE interface PL-2506 Product Datasheet - 10 - Document Version 1.2B www..com Revised Date: July 19, 2005 ds_pl2506_v12B.doc System Pins Table 2-3 System Pins (LQFP64) Symbol REGPWR REGGND REGVO RESETJ SCL SDA TEST PORT1_0 PORT1_1 PORT3_0 PORT3_1 PORT3_3 VCC VCCK GND Type P P P I O B I B B B B B P P P Pin No 57 56 58 38 37 36 39 59 61 63 7 1 11,32,64 25 16,35,60 Description 3.3v Power pin for on-chip 3.3v/2.5v regulator Ground pin for on-chip 3.3v/2.5v regulator 2.5v power output of 3.3v/2.5v regulator External reset pin. Low active. Clock pin of SPI or two-wire serial EEPROM or serial Flash interface. Data pin of SPI or two-wire serial EEPROM or serial Flash interface. Chip Test mode enable. It shall be tie to ground for normal operation. SPI serial interface CS (chip select) signal or general purpose I/O pin. General Purpose I/O pin USB speed LED output or general purpose I/O pin When bus powered, control external power switch. Or general purpose I/O pin. Press button input or general purpose I/O pin 3.3v Power pins 2.5v Power pins Digital ground pins PL-2506 Product Datasheet - 11 - Document Version 1.2B www..com Revised Date: July 19, 2005 ds_pl2506_v12B.doc 2.2 LQFP48 Package 2.2.1 LQFP48 Pin Diagram RESETJ XSCO VCC3 DD[6] DD[9] DD[7] 36 35 34 33 32 31 30 29 28 27 26 25 RREF DD[8] TEST XSCI SDA SCL DD[5] 37 38 39 40 41 42 43 44 45 46 47 48 1 CSJ[0] 24 23 22 21 DD[10] DD[4] DD[11] DD[3] DD[12] DD[2] DD[13] DD[1] DD[14] DD[0] DD[15] IDERSTJ DM DP GNDA VCC3A GNDA VCC3 VCCK PL-2506 LQFP 48 7mm x 7mm 20 19 18 17 16 15 14 13 P1_0 USB_PWR P3_3 CSJ[1] 2 DA[2] 3 DA[1] 4 DA[0] 5 P3_1 6 DMARQ 7 INTRQ 8 IORDY 9 10 11 12 DMACKJ VCC3IO Figure 2-2 Pin Assignment Diagram of PL-2506 LQFP48 PL-2506 Product Datasheet - 12 - DIOWJ DIORJ Document Version 1.2B www..com Revised Date: July 19, 2005 ds_pl2506_v12B.doc 2.2.2 LQFP48 Pin Description Pin Type Abbreviation: I: Input O: Output B: Bidirectional A: Analog P: Power/Ground T: Tri-state USB2.0 PHY Related Pins Table 2-4 USB2.0 PHY Related Pins (LQFP48) Symbol Type Pin No Description XSCI XSCO RREF DP DM VCC3A GNDA I O A B B P P 34 35 37 39 38 41 40, 42 Clock in or CMOS oscillator input CMOS oscillator output PLL Reference level High speed DPLUS signal High speed DMINUS signal Analog Power 3.3V for on-chip PHY Analog Ground for on-chip USB PHY IDE Interface Related Pins Table 2-5 IDE Interface Related Pins (LQFP48) Symbol Type Pin No Description DD[15:0] B 14, 16, 18, 16 pins Data bus of IDE interface 20, 22, 24, 26, 28, 29, 27, 25, 23, 21, 19, 17, 15 2, 3, 4 48, 1 46 13 12 11 10 8 7 6 DA, Data Address pins of IDE interface. Will be in high impedance state until USB connection. CS_, Chip Select pins of IDE interface. Will be in high-impedance state until USB connection. USB VCC signal from USB connection Hardware reset pin of IDE interface. Will be in high impedance state until USB connection. ATA control. Will be in high impedance state until USB connection. ATA control. Will be in high impedance state until USB connection. ATA control. Will be in high impedance state until USB connection. ATA control ATA control ATA control DA[2:0] CSJ[1:0] USB_PWR IDERSTJ DIOWJ DIORJ DMACKJ IORDY INTRQ DMARQ T T I T T T T I I I PL-2506 Product Datasheet - 13 - Document Version 1.2B www..com Revised Date: July 19, 2005 ds_pl2506_v12B.doc System Pins Table 2-6 System Pins (LQFP48) Symbol Type Pin No Description VCC3IO VCC3 VCCK RESETJ TEST P1_0 P3_1 P3_3 SCL SDA P P P I I B B B O B 9 36, 43 44 32 33 45 5 47 31 30 3.3v Power pins 3.3v Power pin for on-chip 3.3v/2.5v regulator 2.5v power output of 3.3v/2.5v regulator External reset pin. Low active. Chip Test mode enable. It shall be tie to ground for normal operation. SPI serial interface CS (chip select) signal or general purpose I/O pin. General Purpose I/O pin USB speed LED output or general purpose I/O pin Clock pin of SPI or two-wire serial EEPROM or serial Flash interface. Data pin of SPI or two-wire serial EEPROM or serial Flash interface. PL-2506 Product Datasheet - 14 - Document Version 1.2B www..com Revised Date: July 19, 2005 ds_pl2506_v12B.doc 3.0 USB Port Descriptor PL-2506 supports the following standard USB descriptors: Device descriptor. Configuration descriptor that supports one interface. String descriptors. Three string descriptors are implemented namely, language ID, Vendor String, and Product String. 3.1 Device Descriptor Table 3-1 Device Descriptor Offset Field Size Value Description 0 1 2 4 5 6 7 8 10 12 14 15 16 17 Notes: (1) (2) bLength bDescriptorType bcdUSB bDeviceClass bDeviceSubclass bDeviceProtocol wMaxPacketSize0 idVendor idProduct bcdDevice iManufacturer iProduct iSerialNumber bNumConfigurations Byte Byte Word Byte Byte Byte Byte Word Word Word Byte Byte Byte Byte 12h 01h 0200h 00h 00h 00h 40h 067Bh 2507h 0100h 01h 02h 00h 01h Size of this descriptor in bytes DEVICE descriptor type USB Specification version 2.0 Interface Specific Interface Specific Interface Specific Maximum packet size for endpoint 0 is 64 Vendor ID for Prolific Technologies (1) Product ID for PL-2506 (1) Device Release 1.0 (1) String index 1 describes manufacturer (2) String index 2 describes product (3) No serial number string One possible configuration - These default values shown here could be modified by external EEPROM. - The default string is "Prolific Technology Inc." in UNICODE format and could be replaced by the contents of external EEPROM. - The default string is "ATAPI-6 Bridge Controller" in UNICODE format and could be replaced by the contents of external EEPROM. (3) PL-2506 Product Datasheet - 15 - Document Version 1.2B www..com Revised Date: July 19, 2005 ds_pl2506_v12B.doc 3.2 Configuration Descriptor Table 3-2 Configuration Descriptor Offset Field Size Value Description 0 1 2 4 5 6 7 8 Notes: (4) (5) bLength bDescriptorType bTotalLength bNumInterfaces bConfigurationValue iConfiguration bmAttributes MaxPower Byte Byte Word Byte Byte Byte Byte Byte 09h 02h 0020h 01h 01h 00h C0h 32h Size of this descriptor in bytes Configuration descriptor type 32 bytes of all Interface and Endpoint The PL-2506 has one interface Value to write to the Device Configuration Register (DCR) to select this configuration. No string description for this Configuration characteristics: (4) Self-Powered & No Remote Wakeup Maximum power consumption is 100 mA (5) - The default value could be replaced by the contents of external EEPROM. 3.3 Interface Descriptors Table 3-3 Interface Descriptors Offset Field Size Value Description 0 1 2 3 4 5 6 7 8 bLength bDescriptorType bInterfaceNumber bAlternateSetting bNumEndpoints bInterfaceClass iInterfaceSubClass bInterfaceProtocol iInterface Byte Byte Byte Byte Byte Byte Byte Byte Byte 09h 04h 00h 00h 02h 08h 06h 50h 00h Size of this descriptor in bytes INTERFACE descriptor type Interface 0 Alternate 0 Supports endpoint 0, 1, and 2 MASS STORAGE class SCSI transparent commend set Bulk-Only Transport protocol No String descriptor for this interface PL-2506 Product Datasheet - 16 - Document Version 1.2B www..com Revised Date: July 19, 2005 ds_pl2506_v12B.doc 3.4 Endpoint Descriptors 3.4.1 High-Speed mode Table 3-4a High-Speed Mode: Bulk Out Endpoint Descriptor (Endpoint 1) Offset Field Size Value Description 0 1 2 3 4 6 bLength bDescriptorType bEndpointAddress bmAttributes wMaxPacketSize bInterval Byte Byte Byte Byte Word Byte 07h 05h 01h 02h 0200h 00h Size of this descriptor in bytes ENDPOINT descriptor type Out Endpoint 1 BULK Endpoint Maximum packet size is 512 N/A Table 3-4b High-Speed Mode: Bulk In Endpoint Descriptor (Endpoint 2) Offset Field Size Value Description 0 1 2 3 4 6 bLength bDescriptorType bEndpointAddress bmAttributes wMaxPacketSize bInterval Byte Byte Byte Byte Word Byte 07h 05h 82h 02h 0200h 00h Size of this descriptor in bytes ENDPOINT descriptor type In Endpoint 2 BULK Endpoint Maximum packet size is 512 N/A 3.4.2 Full-Speed mode Table 3-4c Full-Speed Mode: Bulk Out Endpoint Descriptor (Endpoint 1) Offset Field Size Value Description 0 1 2 3 4 6 bLength bDescriptorType bEndpointAddress bmAttributes wMaxPacketSize bInterval Byte Byte Byte Byte Word Byte 07h 05h 01h 02h 0040h 00h Size of this descriptor in bytes ENDPOINT descriptor type Out Endpoint 1 BULK Endpoint Maximum packet size is 64 N/A Table 3-4d Full-Speed Mode: Bulk In Endpoint Descriptor (Endpoint 2) Offset Field Size Value Description 0 1 2 3 4 6 bLength bDescriptorType bEndpointAddress bmAttributes wMaxPacketSize bInterval Byte Byte Byte Byte Word Byte 07h 05h 82h 02h 0040h 00h Size of this descriptor in bytes ENDPOINT descriptor type In Endpoint 2 BULK Endpoint Maximum packet size is 64 N/A PL-2506 Product Datasheet - 17 - Document Version 1.2B www..com Revised Date: July 19, 2005 ds_pl2506_v12B.doc 3.5 Device_Qualifier Descriptors Table 3-5 Device Qualifier Descriptors Offset Field Size Value Description 0 1 2 4 5 6 7 8 9 bLength bDescriptorType bcdUSB bDeviceClass bDeviceSubclass bDeviceProtocol wMaxPacketSize0 bNumConfigurations bReserved Byte Byte Word Byte Byte Byte Byte Byte Byte 0Ah 06h 0200h 00h 00h 00h 40h 01h 00h Size of this descriptor in bytes DEVICE Qualifier descriptor type USB Specification version 2.0 Interface Specific Interface Specific Interface Specific Maximum packet size for endpoint 0 is 64 Number of other-speed configurations Reserved for future use - must be zero 3.6 Other_Speed_Configuration Descriptors Table 3-6 Other Speed Configuration Descriptors Offset Field Size Value Description 0 1 2 4 5 6 7 8 bLength bDescriptorType bTotalLength bNumInterfaces bConfigurationValue iConfiguration bmAttributes MaxPower Byte Byte Word Byte Byte Byte Byte Byte 09h 07h 0020h 01h 01h 00h C0h 32h Size of this descriptor in bytes CONFIGURATION descriptor type 32 bytes of all INTERFACE & ENDPOINT Number of interface supported, one interface Value to write to the Device Configuration Register (DCR) to select this configuration. No string description for this Configuration characteristics: Self-Powered & No Remote Wakeup Maximum power consumption is 100 mA PL-2506 Product Datasheet - 18 - Document Version 1.2B www..com Revised Date: July 19, 2005 ds_pl2506_v12B.doc 4.0 Device Control Requests Standard USB device request set that perform general functions for supporting the bus and bus related functions. Mass Storage class request set that is USB class defined to implement storage device over USB protocol. Vendor specific requests that are implemented to provide additional control and verification method upon the optional external serial EEPROM. 4.1 Standard Device Control Requests SET_FEATURE/CLEAR_FEATURE: Supports DEVICE_REMOTE_WAKEUP and ENDPOINT_STALL for all endpoints. Requests with incorrect bmRequestType or endpoint number will be stalled. SET_CONFIGURATION/GET_CONFIGURATION GET_INTERFACE/SET_INTERFACE SET_ADDRESS GET_STATUS GET_DESCRIPTOR Note: SET_DESCRIPTOR and SYNCH_FRAME are not supported by the PL-2506. 4.2 Class Specific Requests Table 4-1 Class Specific Requests Command bmType bRequest wValue wIndex wLength Data Note Bulk-Only Mass Storage Reset Get Max LUN 0x21 0xA1 0xFF 0xFE 0 0 interface interface 0 1 None 1 byte 4.2.1 Bulk-Only Mass Storage Reset This request is used to reset the mass storage device and its associated interface. This class-specific request readies the device for the next CBW (Command Block Wrapper) from the host. The host shall send this request via the default pipe to the device. The device shall preserve the value of its bulk data toggle bits and endpoint STALL conditions despite the Bulk-Only Mass Storage Reset. The device shall NAK the status stage of the device request until the Bulk-Only Mass Storage Reset is complete. PL-2506 Product Datasheet - 19 - Document Version 1.2B www..com Revised Date: July 19, 2005 ds_pl2506_v12B.doc 4.2.2 Get Max LUN The device may implement several logical units that share common device characteristics. The host uses bCBWLUN (Section 5.1) to designate which logical unit of the device is the destination of the CBW. The Get Max LUN device request is used to determine the number of logical units supported by the device. Logical Unit Numbers on the device shall be numbered contiguously starting from LUN 0 to a maximum LUN of 15 (Fh). 4.3 Vendor Specific Requests Table 4-2 Vendor Specific Requests Command bmType bRequest wValue wIndex wLength Data Note SET_EEPROM_STR GET_EEPROM_STR 0x41 0xC1 0x05 0x06 0 0 0 0 BL BL Data String Data String Note: The BL shall not exceed 255, the requests will be stalled otherwise. 4.3.1 SET_EEPROM_STRING Request The PL-2506 supports the option to store the Vendor ID, Product ID, and Device Release Number in the device descriptor, as well as Attributes and Max Power setting in the configuration descriptor, and Strings in the String Descriptor through an optional external Serial EEPROM. The PL-2506 will detect the existence of the EEPROM automatically after reset. If the first word retrieved from the EEPROM matches the predefined check byte, 0x067B, it would use the data from this external EEPROM instead of the data from the internal ROM. The vendor specific SET_EEPROM_STRING request is used to change the contents of the EEPROM. The data part of this request is written to the EEPROM from address 0 all the way up to address 255. Therefore, it is necessary for the software to prepare the whole table first and then write it to the EEPROM in one single SET_EEPROM_STRING request. 4.3.2 GET_EEPROM_STRING Request This request allows the driver on the host side to retrieve the whole data table residing in the external serial EEPROM. The returned data is retrieved starting from address 0 to the end of data table from EEPROM. It is mostly used as a verification method to check the data integrity of the previous write. PL-2506 Product Datasheet - 20 - Document Version 1.2B www..com Revised Date: July 19, 2005 ds_pl2506_v12B.doc 5.0 External Serial Memory 5.1 Data Structure of External Serial Memory Contents Table 5-1 Data Structure of EEPROM Contents Address Content Note 1:0 3:2 5:4 7:6 8 9 10 14:11 15 255:16 -:256 Check Word - 0x067B (Predefined constant) Vendor ID (idVendor field of Device Descriptor) Product ID (idProduct field of Device Descriptor) Device Release Number (bdcDevice field of Device Descriptor) Attributes (bmAttributes field of Configuration Descriptor) Max Power (MaxPower field of Configuration Descriptor) Chip operation settings External firmware control IDE transfer mode control String Descriptor Table External firmware From byte 16 to byte 230 are used for USB string descriptors. The String Descriptor table is a linked data structure that holds all string descriptors recognized by this chip in the order of its index. The first entry, String 0, represents the Language ID, as defined by the USB specification. The second entry, String 1, is the Manufacturer Descriptor, as defined by the Device Descriptor of PL-2506. The third and forth entries, String 2 and 3, are the Product Descriptor and Serial Number, respectively, also defined by the Device Descriptor. The user has the option to define String 4, 5, and 6 for their own private use. Each of these String Descriptor Entries is of the following data structure: Table 5-2 String Descriptor Entries Data Structure Offset Field Size Value Note 0 1 2 bLength bDescriptorType bString 1 1 N Length of the string plus 2, i.e. (N + 2). 03h - STRING Descriptor type. UNICODE encoded string. PL-2506 Product Datasheet - 21 - Document Version 1.2B www..com Revised Date: July 19, 2005 ds_pl2506_v12B.doc The last entry of this table must have a bLength of 0 to indicate the end of this table. If the host tries to access to the string descriptor beyond the last one, a zero-length data will be returned. The following table shows one example of valid EEPROM contents: Table 5-3 Example of Valid EEPROM Contents Offset Content Note 0:1 2:3 4:5 6:7 8 9 15:10 16 17 19:18 20 21 69:22 Check Word - 0x067B Vendor ID - 0x067B Product ID - 0x2507 Device Release Number - 0x0100 Constant 0x04 0x03 0x0409 0x32 0x03 `P', 0x00, `r', 0x00, `o', 0x00, `l', 0x00, `i', 0x00, `f', 0x00, `i', 0x00, `c', 0x00, ` `, 0x00, `T', 0x00, `e', 0x00, `c', 0x00, `h', 0x00, `n', 0x00, `o', 0x00, `l', 0x00, `o', 0x00, `g', 0x00, `y', 0x00, ` `, 0x00, `I', 0x00, `n', 0x00, `c', 0x00, `.' , 0x00 0x34 0x03 `A', 0x00, `T', 0x00, `A', 0x00, `P', 0x00, `I`, 0x00, `-', 0x00, `6', 0x00, ` ', 0x00, `B', 0x00, `r`, 0x00, `i', 0x00, `d', 0x00, `g', 0x00, `e', 0x00, ` ', 0x00, `C', 0x00, `o', 0x00, `n', 0x00, `t', 0x00, `r' , 0x00, `o', 0x00, `l', 0x00, `l', 0x00, `e', 0x00, `r', 0x00 0x0A 0x03 `0', 0x00, `1', 0x00, `2', 0x00, `3', 0x00 0x00 String Index 0 (4 Bytes) Language ID for English (United States). String Index 1 (50 Bytes) "Prolific Technology Inc." - manufacturer description. 0x00 is padded for UNICODE. String Index 2 (52 Bytes) "ATAPI-6 Bridge Controller" - device description. 0x00 is padded for UNICODE. String Index 3 (10 bytes) "3210" - serial number, End of String Descriptor Table. 70 71 121:72 122 123 131:124 132 The user could also define other strings, 4 to 6, to hold useful information for the drivers and/or applications, such as software authorization codes, symbolic names, just to name a few. However, the total length of this table must not exceed 256 bytes, the supported maximum size of the external EEPROM. PL-2506 Product Datasheet - 22 - Document Version 1.2B www..com Revised Date: July 19, 2005 ds_pl2506_v12B.doc 6.0 DC Characteristics 6.1 Absolute Maximum Ratings Table 6-1 Absolute Maximum Ratings SYMBOL VCC VIN3 TSTG PARAMETER RATING UNITS 2.5V Power Supply 3.3V Power Supply Input Voltage of 3.3V I/O Input Voltage of 3.3V I/O with 5V Tolerance Storage Temperature -0.3 to 3.0 -0.3 to 3.9 -0.3 to VCC3I +0.3 -0.3 to 5.5 -40 to 150 V V o C 6.2 Operating Current Parameters Table 6-2 Operating Current Parameters SYMBOL PARAMETER Conditions TYP UNITS 8051 running USB High-Speed Supply Current IDD 53 63 58 39 42 42 < 500 mA mA mA mA mA mA uA Write large files to HDD VCD Playback using DVD-ROM 8051 running USB Full-Speed Supply Current ISUS Write large files to HDD VCD Playback using DVD-ROM Suspend Current 6.3 Recommended Operating Conditions Table 6-3 Recommended Operating Conditions SYMBOL VCCK VCC TJ PARAMETER MIN TYP MAX UNITS Power Supply of 2.5V I/O Power Supply of 3.3V I/O Junction Operating Temperature 2.25 3.0 0 2.5 3.3 25 2.75 3.6 115 V V o C PL-2506 Product Datasheet - 23 - Document Version 1.2B www..com Revised Date: July 19, 2005 ds_pl2506_v12B.doc 6.4 Leakage Current and Capacitance Table 6-4 Leakage Current and Capacitance SYMBOL IIL CIN2 COUT2 Notes: (1) (2) (3) PARAMETER CONDITIONS MIN TYP MAX UNITS A Input Leakage Current(2) Input Capacitance Output Capacitance No pull-up or pull-down -10 3.1 3.1 10 pF pF Permanent device damage may occur if Absolute Maximum Ratings are exceeded. The pull up/pull down input leakage current can be derived from the pull up/pull down resistance (Rpu/Rpd) in the DC characteristics table for each type I/O buffer. The capacitances listed above do not include PAD capacitance and package capacitance. One can estimate pin capacitance by adding pad capacitance's that is about 0.1pF and the package capacitance. 6.5 DC Characteristics of 3.3V Programmable I/O Cells Table 6-5 DC Characteristics of 3.3V Programmable I/O Cells SYMBOL VCC31 VIL VIH IIN PARAMETER CONDITIONS MIN TYP MAX UNITS Power Supply Input Low Voltage* Input High Voltage* Input Leakage Current 3.3V I/O CMOS/LVTTL CMOS/LVTTL Vin=0 or VCC31 3.0 3.3 3.6 0.8 V V V 2.0 -10 10 uA 7.0 Ordering Information Table 7-1 Ordering Information Part Number Package Type PL-2506 PL-2506 PL-2506 64-pin LQFP (10x10mm) 64-pin LQFP (7x7mm) 48-pin LQFP (7x7mm) Note: Please contact Prolific Sales office for Lead-Free ordering information. PL-2506 Product Datasheet - 24 - Document Version 1.2B www..com Revised Date: July 19, 2005 ds_pl2506_v12B.doc 8.0 Outline Diagram 8.1 LQFP64pin Package (10mm x 10mm) Figure 8-1 Outline Diagram of PL-2506 LQFP64 (10mm x 10mm) PL-2506 Product Datasheet - 25 - Document Version 1.2B www..com Revised Date: July 19, 2005 ds_pl2506_v12B.doc 8.2 LQFP64pin Package (7mm x 7mm) Figure 8-2 Outline Diagram of PL-2506 LQFP64 (7mm x 7mm) PL-2506 Product Datasheet - 26 - Document Version 1.2B www..com Revised Date: July 19, 2005 ds_pl2506_v12B.doc 8.3 LQFP48pin Package (7mm x 7mm) Figure 8-3 Outline Diagram of PL-2506 LQFP48 (7mm x 7mm) PL-2506 Product Datasheet - 27 - Document Version 1.2B |
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